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001 - NÚMERO DE CONTROL |
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u372290 |
003 - IDENTIFICADOR DEL NÚMERO DE CONTROL |
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SIRSI |
005 - FECHA Y HORA DE LA ULTIMA TRANSACCIÓN |
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20160812084051.0 |
007 - CAMPO FIJO DE DESCRIPCIÓN FIJA--INFORMACIÓN GENERAL |
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008 - ELEMENTOS DE LONGITUD FIJA -- INFORMACIÓN GENERAL |
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110609s2011 xxu| s |||| 0|eng d |
020 ## - NÚMERO INTERNACIONAL NORMALIZADO PARA LIBROS |
International Standard Book Number |
9781441997395 |
-- |
978-1-4419-9739-5 |
040 ## - FUENTE DE CATALOGACIÓN |
Transcribing agency |
MX-MeUAM |
050 #4 - SIGNATURA TOPOGRÁFICA DE LA BIBLIOTECA DEL CONGRESO |
Classification number |
TK7888.4 |
082 04 - NÚMERO DE CLASIFICACIÓN DECIMAL DEWEY |
Classification number |
621.3815 |
Edition number |
23 |
100 1# - ASIENTO PRINCIPAL--NOMBRE PERSONAL |
Personal name |
Vajda, András. |
Relator term |
author. |
245 10 - MENCIÓN DE TITULO |
Title |
Programming Many-Core Chips |
Medium |
[recurso electrónico] / |
Statement of responsibility, etc. |
by András Vajda. |
264 #1 - PRODUCTION, PUBLICATION, DISTRIBUTION, MANUFACTURE, AND COPYRIGHT NOTICE |
Place of production, publication, distribution, manufacture |
Boston, MA : |
Name of producer, publisher, distributor, manufacturer |
Springer US : |
-- |
Imprint: Springer, |
Date of production, publication, distribution, manufacture, or copyright notice |
2011. |
300 ## - DESCRIPCIÓN FÍSICA |
Extent |
XII, 228 p. |
Other physical details |
online resource. |
336 ## - CONTENT TYPE |
Content type term |
text |
Content type code |
txt |
Source |
rdacontent |
337 ## - MEDIA TYPE |
Media type term |
computer |
Media type code |
c |
Source |
rdamedia |
338 ## - CARRIER TYPE |
Carrier type term |
online resource |
Carrier type code |
cr |
Source |
rdacarrier |
347 ## - DIGITAL FILE CHARACTERISTICS |
File type |
text file |
Encoding format |
PDF |
Source |
rda |
505 0# - NOTA DE CONTENIDO |
Formatted contents note |
Introduction -- Multi-core and Many-core Processor Architectures -- State of the Art Multi-core Operating Systems -- The Fundamental Laws of Parallelism -- Fundamentals of Parallel Programming -- Debugging and Performance Analysis of Many-core Programs -- Many-core Virtualization and Operating Systems -- Introduction to Programming Models -- Practical Many-core Programming -- Looking Ahead -- Index. |
520 ## - NOTA DE RESUMEN, ETC. |
Summary, etc. |
Based on current technology trends, in the near future programmers will have to program chips with hundreds or even thousands of processor cores (called many-core chips). Given the scale of parallelism inherent to these chips, software designers face new challenges in terms of operating systems, middleware and applications. This book will serve as an invaluable, single-source reference to the state-of-the-art in the research and practical programming of many-core chips. It presents new concepts, techniques and programming models for dealing with the challenges posed by many-core chips. Coverage includes many-core hardware architectures, present and future operating systems design, middleware design, and the most promising programming models. Provides overview of various, existing homogeneous/heterogeneous processor architectures and explains why current programming models won’t scale when these architectures are scaled to meet the needs of hundreds and thousands of processor cores; Analyzes emerging hardware architectures and their benefits in dealing with scalability issues; Explains challenges and limitations faced by current operating systems and introduces novel solutions, e.g., to resource management and scheduling, illustrated through leading- edge, new operating systems designs; Explains basic concepts of parallel programming and the laws governing the scalability of applications; Explains and compares key concepts in the design of software for massively parallel systems, such as shared memory vs. message passing approaches, data vs. computation movement, as well as several emerging techniques; Explores the most promising programming models for many-core processors, focusing on scalability, such as the task-based model and the actor model; Surveys and compares the currently available programming frameworks, such as OpenMP, Threading Building Blocks and the Erlang language such as many other libraries and programming languages. |
596 ## - |
-- |
19 |
650 #0 - ASIENTO SECUNDARIO DE MATERIA - TERMINO TEMÁTICO |
Topical term or geographic name as entry element |
Engineering. |
650 #0 - ASIENTO SECUNDARIO DE MATERIA - TERMINO TEMÁTICO |
Topical term or geographic name as entry element |
Computer aided design. |
650 #0 - ASIENTO SECUNDARIO DE MATERIA - TERMINO TEMÁTICO |
Topical term or geographic name as entry element |
Systems engineering. |
650 14 - ASIENTO SECUNDARIO DE MATERIA - TERMINO TEMÁTICO |
Topical term or geographic name as entry element |
Engineering. |
650 24 - ASIENTO SECUNDARIO DE MATERIA - TERMINO TEMÁTICO |
Topical term or geographic name as entry element |
Circuits and Systems. |
650 24 - ASIENTO SECUNDARIO DE MATERIA - TERMINO TEMÁTICO |
Topical term or geographic name as entry element |
Computer-Aided Engineering (CAD, CAE) and Design. |
710 2# - ASIENTO SECUNDARIO - NOMBRE CORPORATIVO |
Corporate name or jurisdiction name as entry element |
SpringerLink (Online service) |
773 0# - HOST ITEM ENTRY |
Title |
Springer eBooks |
776 08 - ADDITIONAL PHYSICAL FORM ENTRY |
Relationship information |
Printed edition: |
International Standard Book Number |
9781441997388 |
856 40 - LOCALIZACIÓN Y ACCESO ELECTRÓNICOS |
Public note |
Libro electrónico |
Uniform Resource Identifier |
<a href="http://148.231.10.114:2048/login?url=http://link.springer.com/book/10.1007/978-1-4419-9739-5">http://148.231.10.114:2048/login?url=http://link.springer.com/book/10.1007/978-1-4419-9739-5</a> |
942 ## - TIPO DE MATERIAL (KOHA) |
Koha item type |
Libro Electrónico |