MARC details
000 -LIDER |
fixed length control field |
03813nam a22005175i 4500 |
001 - CONTROL NUMBER |
control field |
978-81-322-2520-1 |
003 - CONTROL NUMBER IDENTIFIER |
control field |
DE-He213 |
005 - DATE AND TIME OF LATEST TRANSACTION |
control field |
20180206183122.0 |
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION |
fixed length control field |
cr nn 008mamaa |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
fixed length control field |
150706s2016 ii | s |||| 0|eng d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
International Standard Book Number |
9788132225201 |
-- |
978-81-322-2520-1 |
050 #4 - LIBRARY OF CONGRESS CALL NUMBER |
Classification number |
TK7888.4 |
072 #7 - SUBJECT CATEGORY CODE |
Subject category code |
TJFC |
Source |
bicssc |
072 #7 - SUBJECT CATEGORY CODE |
Subject category code |
TEC008010 |
Source |
bisacsh |
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER |
Classification number |
621.3815 |
Edition number |
23 |
100 1# - MAIN ENTRY--PERSONAL NAME |
Personal name |
Palchaudhuri, Ayan. |
Relator term |
author. |
245 10 - TITLE STATEMENT |
Title |
High Performance Integer Arithmetic Circuit Design on FPGA |
Medium |
[recurso electrónico] : |
Remainder of title |
Architecture, Implementation and Design Automation / |
Statement of responsibility, etc. |
by Ayan Palchaudhuri, Rajat Subhra Chakraborty. |
264 #1 - |
-- |
New Delhi : |
-- |
Springer India : |
-- |
Imprint: Springer, |
-- |
2016. |
300 ## - PHYSICAL DESCRIPTION |
Extent |
XVII, 114 p. 56 illus. |
Other physical details |
online resource. |
336 ## - |
-- |
text |
-- |
txt |
-- |
rdacontent |
337 ## - |
-- |
computer |
-- |
c |
-- |
rdamedia |
338 ## - |
-- |
online resource |
-- |
cr |
-- |
rdacarrier |
347 ## - |
-- |
text file |
-- |
PDF |
-- |
rda |
490 1# - SERIES STATEMENT |
Series statement |
Springer Series in Advanced Microelectronics, |
International Standard Serial Number |
1437-0387 ; |
Volume/sequential designation |
51 |
505 0# - FORMATTED CONTENTS NOTE |
Formatted contents note |
Introduction -- Architecture of Target FPGA Platform -- A Fabric Component based Design Approach for High Performance Integer Arithmetic Circuits -- Architecture of Data path Circuits -- Architecture of Control path Circuits -- Compact FPGA Implementation of Linear Cellular Automata -- Design Automation and Case Studies -- Conclusions and Future Work. |
520 ## - SUMMARY, ETC. |
Summary, etc. |
This book describes the optimized implementations of several arithmetic datapath, controlpath and pseudorandom sequence generator circuits for realization of high performance arithmetic circuits targeted towards a specific family of the high-end Field Programmable Gate Arrays (FPGAs). It explores regular, modular, cascadable, and bit-sliced architectures of these circuits, by directly instantiating the target FPGA-specific primitives in the HDL. Every proposed architecture is justified with detailed mathematical analyses. Simultaneously, constrained placement of the circuit building blocks is performed, by placing the logically related hardware primitives in close proximity to one another by supplying relevant placement constraints in the Xilinx proprietary ?User Constraints File?. The book covers the implementation of a GUI-based CAD tool named FlexiCore integrated with the Xilinx Integrated Software Environment (ISE) for design automation of platform-specific high-performance arithmetic circuits from user-level specifications. This tool has been used to implement the proposed circuits, as well as hardware implementations of integer arithmetic algorithms where several of the proposed circuits are used as building blocks. Implementation results demonstrate higher performance and superior operand-width scalability for the proposed circuits, with respect to implementations derived through other existing approaches. This book will prove useful to researchers, students, and professionals engaged in the domain of FPGA circuit optimization and implementation. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Término temático o nombre geográfico como elemento de entrada |
Engineering. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Término temático o nombre geográfico como elemento de entrada |
Logic design. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Término temático o nombre geográfico como elemento de entrada |
Electronics. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Término temático o nombre geográfico como elemento de entrada |
Microelectronics. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Término temático o nombre geográfico como elemento de entrada |
Electronic circuits. |
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Término temático o nombre geográfico como elemento de entrada |
Engineering. |
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Término temático o nombre geográfico como elemento de entrada |
Circuits and Systems. |
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Término temático o nombre geográfico como elemento de entrada |
Electronics and Microelectronics, Instrumentation. |
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Término temático o nombre geográfico como elemento de entrada |
Logic Design. |
700 1# - ADDED ENTRY--PERSONAL NAME |
Personal name |
Chakraborty, Rajat Subhra. |
Relator term |
author. |
710 2# - ADDED ENTRY--CORPORATE NAME |
Corporate name or jurisdiction name as entry element |
SpringerLink (Online service) |
773 0# - HOST ITEM ENTRY |
Title |
Springer eBooks |
776 08 - ADDITIONAL PHYSICAL FORM ENTRY |
Relationship information |
Printed edition: |
International Standard Book Number |
9788132225195 |
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE |
Uniform title |
Springer Series in Advanced Microelectronics, |
-- |
1437-0387 ; |
Volume number/sequential designation |
51 |
856 40 - ELECTRONIC LOCATION AND ACCESS |
Public note |
Libro electrónico |
Uniform Resource Identifier |
http://148.231.10.114:2048/login?url=http://dx.doi.org/10.1007/978-81-322-2520-1 |
912 ## - |
-- |
ZDB-2-ENG |
942 ## - ADDED ENTRY ELEMENTS (KOHA) |
Koha item type |
Libro Electrónico |