MARC details
000 -LIDER |
fixed length control field |
04537nam a22005895i 4500 |
001 - CONTROL NUMBER |
control field |
978-981-10-8554-3 |
003 - CONTROL NUMBER IDENTIFIER |
control field |
DE-He213 |
005 - DATE AND TIME OF LATEST TRANSACTION |
control field |
20210201191451.0 |
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION |
fixed length control field |
cr nn 008mamaa |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
fixed length control field |
180322s2018 si | s |||| 0|eng d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
International Standard Book Number |
9789811085543 |
-- |
978-981-10-8554-3 |
050 #4 - LIBRARY OF CONGRESS CALL NUMBER |
Classification number |
TK7888.4 |
072 #7 - SUBJECT CATEGORY CODE |
Subject category code |
TJFC |
Source |
bicssc |
072 #7 - SUBJECT CATEGORY CODE |
Subject category code |
TEC008010 |
Source |
bisacsh |
072 #7 - SUBJECT CATEGORY CODE |
Subject category code |
TJFC |
Source |
thema |
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER |
Classification number |
621.3815 |
Edition number |
23 |
100 1# - MAIN ENTRY--PERSONAL NAME |
Personal name |
Haj-Yahya, Jawad. |
Relator term |
author. |
Relator code |
aut |
-- |
http://id.loc.gov/vocabulary/relators/aut |
245 10 - TITLE STATEMENT |
Title |
Energy Efficient High Performance Processors |
Medium |
[electronic resource] : |
Remainder of title |
Recent Approaches for Designing Green High Performance Computing / |
Statement of responsibility, etc. |
by Jawad Haj-Yahya, Avi Mendelson, Yosi Ben Asher, Anupam Chattopadhyay. |
250 ## - EDITION STATEMENT |
Edition statement |
1st ed. 2018. |
264 #1 - |
-- |
Singapore : |
-- |
Springer Singapore : |
-- |
Imprint: Springer, |
-- |
2018. |
300 ## - PHYSICAL DESCRIPTION |
Extent |
XIV, 165 p. 73 illus., 68 illus. in color. |
Other physical details |
online resource. |
336 ## - |
-- |
text |
-- |
txt |
-- |
rdacontent |
337 ## - |
-- |
computer |
-- |
c |
-- |
rdamedia |
338 ## - |
-- |
online resource |
-- |
cr |
-- |
rdacarrier |
347 ## - |
-- |
text file |
-- |
PDF |
-- |
rda |
490 1# - SERIES STATEMENT |
Series statement |
Computer Architecture and Design Methodologies, |
International Standard Serial Number |
2367-3478 |
500 ## - GENERAL NOTE |
General note |
Acceso multiusuario |
505 0# - FORMATTED CONTENTS NOTE |
Formatted contents note |
Introduction -- Background -- DOEE: Dynamic Optimization framework for better Energy Efficiency -- Fine-grain Power Breakdown of Modern Out-Of-Order Cores and its implications on Skylake based systems -- Compiler-Directed Power Management for Superscalars -- SEEM: Symbolic Execution for Energy Modeling -- Related Works -- Conclusions and Future Work. |
520 ## - SUMMARY, ETC. |
Summary, etc. |
This book explores energy efficiency techniques for high-performance computing (HPC) systems using power-management methods. Adopting a step-by-step approach, it describes power-management flows, algorithms and mechanism that are employed in modern processors such as Intel Sandy Bridge, Haswell, Skylake and other architectures (e.g. ARM). Further, it includes practical examples and recent studies demonstrating how modem processors dynamically manage wide power ranges, from a few milliwatts in the lowest idle power state, to tens of watts in turbo state. Moreover, the book explains how thermal and power deliveries are managed in the context this huge power range. The book also discusses the different metrics for energy efficiency, presents several methods and applications of the power and energy estimation, and shows how by using innovative power estimation methods and new algorithms modern processors are able to optimize metrics such as power, energy, and performance. Different power estimation tools are presented, including tools that break down the power consumption of modern processors at sub-processor core/thread granularity. The book also investigates software, firmware and hardware coordination methods of reducing power consumption, for example a compiler-assisted power management method to overcome power excursions. Lastly, it examines firmware algorithms for dynamic cache resizing and dynamic voltage and frequency scaling (DVFS) for memory sub-systems. |
541 ## - IMMEDIATE SOURCE OF ACQUISITION NOTE |
Owner |
UABC ; |
Method of acquisition |
Temporal ; |
Date of acquisition |
01/01/2021-12/31/2023. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Término temático o nombre geográfico como elemento de entrada |
Electronic circuits. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Término temático o nombre geográfico como elemento de entrada |
Microprocessors. |
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Término temático o nombre geográfico como elemento de entrada |
Circuits and Systems. |
-- |
https://scigraph.springernature.com/ontologies/product-market-codes/T24068 |
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Término temático o nombre geográfico como elemento de entrada |
Processor Architectures. |
-- |
https://scigraph.springernature.com/ontologies/product-market-codes/I13014 |
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Término temático o nombre geográfico como elemento de entrada |
Electronic Circuits and Devices. |
-- |
https://scigraph.springernature.com/ontologies/product-market-codes/P31010 |
700 1# - ADDED ENTRY--PERSONAL NAME |
Personal name |
Mendelson, Avi. |
Relator term |
author. |
Relator code |
aut |
-- |
http://id.loc.gov/vocabulary/relators/aut |
700 1# - ADDED ENTRY--PERSONAL NAME |
Personal name |
Ben Asher, Yosi. |
Relator term |
author. |
Relator code |
aut |
-- |
http://id.loc.gov/vocabulary/relators/aut |
700 1# - ADDED ENTRY--PERSONAL NAME |
Personal name |
Chattopadhyay, Anupam. |
Relator term |
author. |
-- |
(orcid)0000-0002-8818-6983 |
-- |
https://orcid.org/0000-0002-8818-6983 |
Relator code |
aut |
-- |
http://id.loc.gov/vocabulary/relators/aut |
710 2# - ADDED ENTRY--CORPORATE NAME |
Corporate name or jurisdiction name as entry element |
SpringerLink (Online service) |
773 0# - HOST ITEM ENTRY |
Title |
Springer Nature eBook |
776 08 - ADDITIONAL PHYSICAL FORM ENTRY |
Relationship information |
Printed edition: |
International Standard Book Number |
9789811085536 |
776 08 - ADDITIONAL PHYSICAL FORM ENTRY |
Relationship information |
Printed edition: |
International Standard Book Number |
9789811085550 |
776 08 - ADDITIONAL PHYSICAL FORM ENTRY |
Relationship information |
Printed edition: |
International Standard Book Number |
9789811341847 |
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE |
Uniform title |
Computer Architecture and Design Methodologies, |
-- |
2367-3478 |
856 40 - ELECTRONIC LOCATION AND ACCESS |
Public note |
Libro electrónico |
Uniform Resource Identifier |
http://148.231.10.114:2048/login?url=https://doi.org/10.1007/978-981-10-8554-3 |
912 ## - |
-- |
ZDB-2-ENG |
912 ## - |
-- |
ZDB-2-SXE |
942 ## - ADDED ENTRY ELEMENTS (KOHA) |
Koha item type |
Libro Electrónico |