MARC details
000 -LIDER |
fixed length control field |
04468nam a22006015i 4500 |
001 - CONTROL NUMBER |
control field |
978-3-319-74382-0 |
003 - CONTROL NUMBER IDENTIFIER |
control field |
DE-He213 |
005 - DATE AND TIME OF LATEST TRANSACTION |
control field |
20210201191506.0 |
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION |
fixed length control field |
cr nn 008mamaa |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
fixed length control field |
180314s2018 gw | s |||| 0|eng d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
International Standard Book Number |
9783319743820 |
-- |
978-3-319-74382-0 |
050 #4 - LIBRARY OF CONGRESS CALL NUMBER |
Classification number |
TK7888.4 |
072 #7 - SUBJECT CATEGORY CODE |
Subject category code |
TJFC |
Source |
bicssc |
072 #7 - SUBJECT CATEGORY CODE |
Subject category code |
TEC008010 |
Source |
bisacsh |
072 #7 - SUBJECT CATEGORY CODE |
Subject category code |
TJFC |
Source |
thema |
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER |
Classification number |
621.3815 |
Edition number |
23 |
100 1# - MAIN ENTRY--PERSONAL NAME |
Personal name |
Buccella, Pietro. |
Relator term |
author. |
Relator code |
aut |
-- |
http://id.loc.gov/vocabulary/relators/aut |
245 10 - TITLE STATEMENT |
Title |
Parasitic Substrate Coupling in High Voltage Integrated Circuits |
Medium |
[electronic resource] : |
Remainder of title |
Minority and Majority Carriers Propagation in Semiconductor Substrate / |
Statement of responsibility, etc. |
by Pietro Buccella, Camillo Stefanucci, Maher Kayal, Jean-Michel Sallese. |
250 ## - EDITION STATEMENT |
Edition statement |
1st ed. 2018. |
264 #1 - |
-- |
Cham : |
-- |
Springer International Publishing : |
-- |
Imprint: Springer, |
-- |
2018. |
300 ## - PHYSICAL DESCRIPTION |
Extent |
XVII, 183 p. 124 illus., 73 illus. in color. |
Other physical details |
online resource. |
336 ## - |
-- |
text |
-- |
txt |
-- |
rdacontent |
337 ## - |
-- |
computer |
-- |
c |
-- |
rdamedia |
338 ## - |
-- |
online resource |
-- |
cr |
-- |
rdacarrier |
347 ## - |
-- |
text file |
-- |
PDF |
-- |
rda |
490 1# - SERIES STATEMENT |
Series statement |
Analog Circuits and Signal Processing, |
International Standard Serial Number |
1872-082X |
500 ## - GENERAL NOTE |
General note |
Acceso multiusuario |
505 0# - FORMATTED CONTENTS NOTE |
Formatted contents note |
Chapter1: Overview of Parasitic Substrate Coupling -- Chapter2: Design Challenges in High Voltage ICs -- Chapter3: Substrate Modeling with Parasitic Transistors -- Chapter4: TCAD Validation of the Model -- Chapter5: Extraction Tool for the Substrate Network -- Chapter6: Parasitic Bipolar Transistors in Benchmark Structures -- Chapter7: Substrate Coupling Analysis and Evaluation of Protection Strategies. |
520 ## - SUMMARY, ETC. |
Summary, etc. |
This book introduces a new approach to model and predict substrate parasitic failures in integrated circuits with standard circuit design tools. The injection of majority and minority carriers in the substrate is a recurring problem in smart power ICs containing high voltage, high current switching devices besides sensitive control, protection and signal processing circuits. The injection of parasitic charges leads to the activation of substrate bipolar transistors. This book explores how these events can be evaluated for a wide range of circuit topologies. To this purpose, new generalized devices implemented in Verilog-A are used to model the substrate with standard circuit simulators. This approach was able to predict for the first time the activation of a latch-up in real circuits through post-layout SPICE simulation analysis. Discusses substrate modeling and circuit-level simulation of parasitic bipolar device coupling effects in integrated circuits; Includes circuit back-annotation of the parasitic lateral n-p-n and vertical p-n-p bipolar transistors in the substrate; Uses Spice for simulation and characterization of parasitic bipolar transistors, latch-up of the parasitic p-n-p-n structure, and electrostatic discharge (ESD) protection devices; Offers design guidelines to reduce couplings by adding specific test protections. |
541 ## - IMMEDIATE SOURCE OF ACQUISITION NOTE |
Owner |
UABC ; |
Method of acquisition |
Temporal ; |
Date of acquisition |
01/01/2021-12/31/2023. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Término temático o nombre geográfico como elemento de entrada |
Electronic circuits. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Término temático o nombre geográfico como elemento de entrada |
Electronics. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Término temático o nombre geográfico como elemento de entrada |
Microelectronics. |
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Término temático o nombre geográfico como elemento de entrada |
Circuits and Systems. |
-- |
https://scigraph.springernature.com/ontologies/product-market-codes/T24068 |
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Término temático o nombre geográfico como elemento de entrada |
Electronic Circuits and Devices. |
-- |
https://scigraph.springernature.com/ontologies/product-market-codes/P31010 |
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Término temático o nombre geográfico como elemento de entrada |
Electronics and Microelectronics, Instrumentation. |
-- |
https://scigraph.springernature.com/ontologies/product-market-codes/T24027 |
700 1# - ADDED ENTRY--PERSONAL NAME |
Personal name |
Stefanucci, Camillo. |
Relator term |
author. |
Relator code |
aut |
-- |
http://id.loc.gov/vocabulary/relators/aut |
700 1# - ADDED ENTRY--PERSONAL NAME |
Personal name |
Kayal, Maher. |
Relator term |
author. |
Relator code |
aut |
-- |
http://id.loc.gov/vocabulary/relators/aut |
700 1# - ADDED ENTRY--PERSONAL NAME |
Personal name |
Sallese, Jean-Michel. |
Relator term |
author. |
Relator code |
aut |
-- |
http://id.loc.gov/vocabulary/relators/aut |
710 2# - ADDED ENTRY--CORPORATE NAME |
Corporate name or jurisdiction name as entry element |
SpringerLink (Online service) |
773 0# - HOST ITEM ENTRY |
Title |
Springer Nature eBook |
776 08 - ADDITIONAL PHYSICAL FORM ENTRY |
Relationship information |
Printed edition: |
International Standard Book Number |
9783319743813 |
776 08 - ADDITIONAL PHYSICAL FORM ENTRY |
Relationship information |
Printed edition: |
International Standard Book Number |
9783319743837 |
776 08 - ADDITIONAL PHYSICAL FORM ENTRY |
Relationship information |
Printed edition: |
International Standard Book Number |
9783030089764 |
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE |
Uniform title |
Analog Circuits and Signal Processing, |
-- |
1872-082X |
856 40 - ELECTRONIC LOCATION AND ACCESS |
Public note |
Libro electrónico |
Uniform Resource Identifier |
http://148.231.10.114:2048/login?url=https://doi.org/10.1007/978-3-319-74382-0 |
912 ## - |
-- |
ZDB-2-ENG |
912 ## - |
-- |
ZDB-2-SXE |
942 ## - ADDED ENTRY ELEMENTS (KOHA) |
Koha item type |
Libro Electrónico |