MARC details
000 -LIDER |
fixed length control field |
03702nam a22005415i 4500 |
001 - CONTROL NUMBER |
control field |
978-3-031-43946-9 |
003 - CONTROL NUMBER IDENTIFIER |
control field |
DE-He213 |
005 - DATE AND TIME OF LATEST TRANSACTION |
control field |
20250516155926.0 |
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION |
fixed length control field |
cr nn 008mamaa |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
fixed length control field |
231019s2024 sz | s |||| 0|eng d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
International Standard Book Number |
9783031439469 |
-- |
978-3-031-43946-9 |
050 #4 - LIBRARY OF CONGRESS CALL NUMBER |
Classification number |
TK7867-7867.5 |
072 #7 - SUBJECT CATEGORY CODE |
Subject category code |
TJFC |
Source |
bicssc |
072 #7 - SUBJECT CATEGORY CODE |
Subject category code |
TEC008010 |
Source |
bisacsh |
072 #7 - SUBJECT CATEGORY CODE |
Subject category code |
TJFC |
Source |
thema |
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER |
Classification number |
621.3815 |
Edition number |
23 |
100 1# - MAIN ENTRY--PERSONAL NAME |
Personal name |
LaMeres, Brock J. |
Relator term |
author. |
Relator code |
aut |
-- |
http://id.loc.gov/vocabulary/relators/aut |
245 10 - TITLE STATEMENT |
Title |
Introduction to Logic Circuits & Logic Design with Verilog |
Medium |
[electronic resource] / |
Statement of responsibility, etc. |
by Brock J. LaMeres. |
250 ## - EDITION STATEMENT |
Edition statement |
3rd ed. 2024. |
264 #1 - |
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Cham : |
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Springer International Publishing : |
-- |
Imprint: Springer, |
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2024. |
300 ## - PHYSICAL DESCRIPTION |
Extent |
XVII, 527 p. 534 illus., 479 illus. in color. |
Other physical details |
online resource. |
336 ## - |
-- |
text |
-- |
txt |
-- |
rdacontent |
337 ## - |
-- |
computer |
-- |
c |
-- |
rdamedia |
338 ## - |
-- |
online resource |
-- |
cr |
-- |
rdacarrier |
347 ## - |
-- |
text file |
-- |
PDF |
-- |
rda |
505 0# - FORMATTED CONTENTS NOTE |
Formatted contents note |
Introduction - Analog Vs. Digital -- Number Systems -- Digital Circuitry & Interfacing -- Combinational Logic Design -- Verilog (Part 1) -- MSI Logic -- Sequential Logic Design -- Verilog (Part 2) -- Behavioral Modeling of Sequential Logic -- Memory -- Programmable Logic -- Arithmetic Circuits -- Computer System Design -- Appendix A: List of Worked Examples. |
520 ## - SUMMARY, ETC. |
Summary, etc. |
This textbook for courses in Digital Systems Design introduces students to the fundamental hardware used in modern computers. Coverage includes both the classical approach to digital system design (i.e., pen and paper) in addition to the modern hardware description language (HDL) design approach (computer-based). Using this textbook enables readers to design digital systems using the modern HDL approach, but they have a broad foundation of knowledge of the underlying hardware and theory of their designs. This book is designed to match the way the material is actually taught in the classroom. Topics are presented in a manner which builds foundational knowledge before moving onto advanced topics. The author has designed the presentation with learning goals and assessment at its core. Each section addresses a specific learning outcome that the student should be able to "do" after its completion. The concept checks and exercise problems provide a rich set of assessment tools to measurestudent performance on each outcome. Written the way the material is taught, enabling a bottom-up approach to learning which culminates with a high-level of learning, with a solid foundation; Emphasizes examples from which students can learn: contains a solved example for nearly every section in the book; Includes more than 1000 exercise problems, as well as concept check questions for each section, tied directly to specific learning outcomes. |
541 ## - IMMEDIATE SOURCE OF ACQUISITION NOTE |
Owner |
UABC ; |
Method of acquisition |
Perpetuidad |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Término temático o nombre geográfico como elemento de entrada |
Electronic circuits. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Término temático o nombre geográfico como elemento de entrada |
Microprocessors. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Término temático o nombre geográfico como elemento de entrada |
Computer architecture. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Término temático o nombre geográfico como elemento de entrada |
Logic design. |
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Término temático o nombre geográfico como elemento de entrada |
Electronic Circuits and Systems. |
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Término temático o nombre geográfico como elemento de entrada |
Processor Architectures. |
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Término temático o nombre geográfico como elemento de entrada |
Logic Design. |
710 2# - ADDED ENTRY--CORPORATE NAME |
Corporate name or jurisdiction name as entry element |
SpringerLink (Online service) |
773 0# - HOST ITEM ENTRY |
Title |
Springer Nature eBook |
776 08 - ADDITIONAL PHYSICAL FORM ENTRY |
Relationship information |
Printed edition: |
International Standard Book Number |
9783031439452 |
776 08 - ADDITIONAL PHYSICAL FORM ENTRY |
Relationship information |
Printed edition: |
International Standard Book Number |
9783031439476 |
776 08 - ADDITIONAL PHYSICAL FORM ENTRY |
Relationship information |
Printed edition: |
International Standard Book Number |
9783031439483 |
856 40 - ELECTRONIC LOCATION AND ACCESS |
Public note |
Libro electrónico |
Uniform Resource Identifier |
http://libcon.rec.uabc.mx:2048/login?url=https://doi.org/10.1007/978-3-031-43946-9 |
912 ## - |
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ZDB-2-ENG |
912 ## - |
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ZDB-2-SXE |
942 ## - ADDED ENTRY ELEMENTS (KOHA) |
Koha item type |
Libro Electrónico |