VLSI Design for Video Coding [recurso electrónico] : H.264/AVC Encoding from Standard Specification to Chip / by Youn-Long Steve Lin, Chao-Yang Kao, Hung-Chih Kuo, Jian-Wen Chen.

Por: Lin, Youn-Long Steve [author.]Colaborador(es): Kao, Chao-Yang [author.] | Kuo, Hung-Chih [author.] | Chen, Jian-Wen [author.] | SpringerLink (Online service)Tipo de material: TextoTextoEditor: Boston, MA : Springer US, 2010Edición: 1stDescripción: XI, 176 p. online resourceTipo de contenido: text Tipo de medio: computer Tipo de portador: online resourceISBN: 9781441909596Tema(s): Engineering | Computer aided design | Systems engineering | Engineering | Circuits and Systems | Computer-Aided Engineering (CAD, CAE) and DesignFormatos físicos adicionales: Printed edition:: Sin títuloClasificación CDD: 621.3815 Clasificación LoC:TK7888.4Recursos en línea: Libro electrónicoTexto
Contenidos:
to Video Coding and H.264/AVC -- Intra Prediction -- Integer Motion Estimation -- Fractional Motion Estimation -- Motion Compensation -- Transform Coding -- Deblocking Filter -- CABAC Encoder -- System Integration.
En: Springer eBooksResumen: Back Cover Copy VLSI Design for Video Coding By: Youn-Long Lin Chao-Yang Kao Jian-Wen Chen Hung-Chih Kuo High definition video requires substantial compression in order to be transmitted or stored economically. Advances in video coding standards from MPEG-1, MPEG-2, MPEG-4 to H.264/AVC have provided ever increasing coding efficiency, at the expense of great computational complexity which can only be delivered through massively parallel processing. This book presents VLSI architectural design and chip implementation for high definition H.264/AVC video encoding with a complete FPGA prototype. It serves as an invaluable reference for anyone interested in VLSI design for video coding. • Presents state-of-the-art VLSI architectural design and chip implementation for high definition H.264/AVC video encoding; • Employs massively parallel processing to deliver 1080pHD, with efficient design that can be prototyped via FPGA; • Every subsystem is presented from standard specification, algorithmic description, design considerations, timing planning, block diagram to test-bench verification;
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Colección de Libros Electrónicos TK7888.4 (Browse shelf(Abre debajo)) 1 No para préstamo 371215-2001

to Video Coding and H.264/AVC -- Intra Prediction -- Integer Motion Estimation -- Fractional Motion Estimation -- Motion Compensation -- Transform Coding -- Deblocking Filter -- CABAC Encoder -- System Integration.

Back Cover Copy VLSI Design for Video Coding By: Youn-Long Lin Chao-Yang Kao Jian-Wen Chen Hung-Chih Kuo High definition video requires substantial compression in order to be transmitted or stored economically. Advances in video coding standards from MPEG-1, MPEG-2, MPEG-4 to H.264/AVC have provided ever increasing coding efficiency, at the expense of great computational complexity which can only be delivered through massively parallel processing. This book presents VLSI architectural design and chip implementation for high definition H.264/AVC video encoding with a complete FPGA prototype. It serves as an invaluable reference for anyone interested in VLSI design for video coding. • Presents state-of-the-art VLSI architectural design and chip implementation for high definition H.264/AVC video encoding; • Employs massively parallel processing to deliver 1080pHD, with efficient design that can be prototyped via FPGA; • Every subsystem is presented from standard specification, algorithmic description, design considerations, timing planning, block diagram to test-bench verification;

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