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Low Power Hardware Synthesis from Concurrent Action-Oriented Specifications [recurso electrónico] / by Gaurav Singh, Sandeep K. Shukla.

Por: Singh, Gaurav [author.]Colaborador(es): Shukla, Sandeep K [author.] | SpringerLink (Online service)Tipo de material: Texto

TextoEditor: New York, NY : Springer New York, 2010Descripción: XXX, 154 p. online resourceTipo de contenido: text Tipo de medio: computer Tipo de portador: online resourceISBN: 9781441964816Tema(s): Engineering | Computer aided design | Systems engineering | Engineering | Circuits and Systems | Computer-Aided Engineering (CAD, CAE) and DesignFormatos físicos adicionales: Printed edition:: Sin títuloClasificación CDD: 621.3815 Clasificación LoC:TK7888.4Recursos en línea: Libro electrónico Texto

Contenidos:

Related Work -- Background -- Low-Power Problem Formalization -- Heuristics for Power Savings -- Complexity Analysis of Scheduling in CAOS-Based Synthesis -- Dynamic Power Optimizations -- Peak Power Optimizations -- Verifying Peak Power Optimizations Using SPIN Model Checker -- Epilogue.

En: Springer eBooksResumen: Low Power Hardware Synthesis from Concurrent Action-Oriented Specifications Gaurav Singh Sandeep K. Shukla This book introduces novel techniques for generating low-power hardware from a high-level description of a design in terms of Concurrent Action-Oriented Specifications (CAOS). It also describes novel techniques for formal verification of such designs. It will provide the readers with definitions of various power optimization and formal verification problems related to CAOS-based synthesis, necessary background concepts, techniques to generate hardware according to the design’s power requirements, and detailed experimental results obtained by applying the techniques introduced on realistic hardware designs. •Presents detailed analysis of various power optimization problems associated with high-level synthesis, as well as novel techniques for reducing power consumption of hardware designs at a higher level of abstraction; •Discusses various formal verification issues associated with synthesizing different possible versions of a hardware design (differing in their latency, area, and/or power consumption); •Includes detailed experimental results obtained by applying the techniques introduced on benchmark hardware designs.

Existencias ( 1 )
Notas de título ( 3 )

Existencias
Tipo de ítem	Biblioteca actual	Colección	Signatura	Copia número	Estado	Fecha de vencimiento	Código de barras
Libro Electrónico	Biblioteca Electrónica	Colección de Libros Electrónicos	TK7888.4 (Browse shelf(Abre debajo))	1	No para préstamo		371673-2001

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Low Power Hardware Synthesis from Concurrent Action-Oriented Specifications Gaurav Singh Sandeep K. Shukla This book introduces novel techniques for generating low-power hardware from a high-level description of a design in terms of Concurrent Action-Oriented Specifications (CAOS). It also describes novel techniques for formal verification of such designs. It will provide the readers with definitions of various power optimization and formal verification problems related to CAOS-based synthesis, necessary background concepts, techniques to generate hardware according to the design’s power requirements, and detailed experimental results obtained by applying the techniques introduced on realistic hardware designs. •Presents detailed analysis of various power optimization problems associated with high-level synthesis, as well as novel techniques for reducing power consumption of hardware designs at a higher level of abstraction; •Discusses various formal verification issues associated with synthesizing different possible versions of a hardware design (differing in their latency, area, and/or power consumption); •Includes detailed experimental results obtained by applying the techniques introduced on benchmark hardware designs.