Analog Layout Synthesis [recurso electrónico] : A Survey of Topological Approaches / edited by Helmut E. Graeb.
Tipo de material: TextoEditor: Boston, MA : Springer US, 2011Descripción: XV, 302 p. online resourceTipo de contenido: text Tipo de medio: computer Tipo de portador: online resourceISBN: 9781441969323Tema(s): Engineering | Computer aided design | Systems engineering | Engineering | Circuits and Systems | Computer-Aided Engineering (CAD, CAE) and DesignFormatos físicos adicionales: Printed edition:: Sin títuloClasificación CDD: 621.3815 Clasificación LoC:TK7888.4Recursos en línea: Libro electrónicoTipo de ítem | Biblioteca actual | Colección | Signatura | Copia número | Estado | Fecha de vencimiento | Código de barras |
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Libro Electrónico | Biblioteca Electrónica | Colección de Libros Electrónicos | TK7888.4 (Browse shelf(Abre debajo)) | 1 | No para préstamo | 371781-2001 |
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TK7888.4 Design and Analysis of Biomolecular Circuits | TK7888.4 On-Chip Interconnect with aelite | TK7888.4 Low Power Networks-on-Chip | TK7888.4 Analog Layout Synthesis | TK7888.4 Software Automatic Tuning | TK7888.4 Soft Errors in Modern Electronic Systems | TK7888.4 Design of Image Processing Embedded Systems Using Multidimensional Data Flow |
Device-level topological placement with symmetry constraints -- Hierarchical placement with layout constraints -- Enhanced shape functions for deterministic analog placement -- Free-Shape Routing for Analog and RF circuits -- Closing the gap between electrical and physical design of analog circuits: the layout-aware solution -- Analog layout retargeting -- Template-driven analog layout automation -- Place and route of analog circuits.
Analog Layout Synthesis: A Survey of Topological Approaches Edited by: Helmut E. Graeb Analog components appear on 75% of all chips, and cause 40% of the design effort and 50% of the re-designs. Due to increasing functional complexity of systems-on-chip, the difficulties in analog design and the lack of design automation support for analog circuits make analog components a bottleneck in chip design. Design methodology and design automation for analog circuits therefore is a crucial problem for developing systems-on-chip and layout synthesis is a key part of the analog design flow. Layout design is the step of the analog design flow with the least support by commercially available, computer-aided design tools. This book provides a survey of promising new approaches to automated, analog layout design, which have been described recently and are rapidly being adopted in industry. •Presents a comprehensive survey of promising new methods for automated, analog layout design; •Covers a variety recent of approaches to topological placement of analog circuits; •Provides a comprehensive overview of routing issues and techniques for analog circuits; •Provides a complete view of analog layout in the design flow, including retargeting an existing layout for a new technology, integrating layout in the sizing process, and constraint management; •Represents a one-of-a-kind, single-source reference to the latest advances in analog layout synthesis.
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