Evaluation of State-of-the-Art Hardware Architectures for Fast Cone-Beam CT Reconstruction [recurso electrónico] / by Holger Scherl.
Tipo de material: TextoEditor: Wiesbaden : Vieweg+Teubner, 2011Descripción: XX, 138 p. online resourceTipo de contenido: text Tipo de medio: computer Tipo de portador: online resourceISBN: 9783834882592Tema(s): Computer science | Computer Science | Computer Science, generalFormatos físicos adicionales: Printed edition:: Sin títuloClasificación CDD: 004 Clasificación LoC:QA75.5-76.95Recursos en línea: Libro electrónico En: Springer eBooksResumen: This book considers the field of computed tomography including a review of state-of-the-art reconstruction algorithms and a concise assessment of the most recent hardware architectures. Holger Scherl introduces the reader to the reconstruction problem in computed tomography and its major scientific challenges that range from computational efficiency to the fulfillment of Tuy's sufficiency condition. The assessed hardware architectures include multi- and many-core systems, cell broadband engine architecture, graphics processing units, and field programmable gate arrays. The author focuses on the interplay between these recent hardware platforms and modern computed tomography reconstruction algorithms.Tipo de ítem | Biblioteca actual | Colección | Signatura | Copia número | Estado | Fecha de vencimiento | Código de barras |
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Libro Electrónico | Biblioteca Electrónica | Colección de Libros Electrónicos | QA75.5 -76.95 (Browse shelf(Abre debajo)) | 1 | No para préstamo | 377081-2001 |
This book considers the field of computed tomography including a review of state-of-the-art reconstruction algorithms and a concise assessment of the most recent hardware architectures. Holger Scherl introduces the reader to the reconstruction problem in computed tomography and its major scientific challenges that range from computational efficiency to the fulfillment of Tuy's sufficiency condition. The assessed hardware architectures include multi- and many-core systems, cell broadband engine architecture, graphics processing units, and field programmable gate arrays. The author focuses on the interplay between these recent hardware platforms and modern computed tomography reconstruction algorithms.
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