Logic Synthesis for Finite State Machines Based on Linear Chains of States [electronic resource] : Foundations, Recent Developments and Challenges / by Alexander Barkalov, Larysa Titarenko, Jacek Bieganowski.
Tipo de material: TextoSeries Studies in Systems, Decision and Control ; 113Editor: Cham : Springer International Publishing : Imprint: Springer, 2018Edición: 1st ed. 2018Descripción: VIII, 225 p. 145 illus. online resourceTipo de contenido: text Tipo de medio: computer Tipo de portador: online resourceISBN: 9783319598376Tema(s): Computational intelligence | Electronic circuits | Computational Intelligence | Circuits and SystemsFormatos físicos adicionales: Printed edition:: Sin título; Printed edition:: Sin título; Printed edition:: Sin títuloClasificación CDD: 006.3 Clasificación LoC:Q342Recursos en línea: Libro electrónicoTipo de ítem | Biblioteca actual | Colección | Signatura | Copia número | Estado | Fecha de vencimiento | Código de barras |
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Libro Electrónico | Biblioteca Electrónica | Colección de Libros Electrónicos | 1 | No para préstamo |
Acceso multiusuario
Introduction -- Finite state machines and field-programmable gate arrays -- Linear chains in FSMs -- Hardware reduction for Moore UFSMs -- Hardware reduction for Mealy UFSMs -- Hardware reduction for Moore NFSMs -- Hardware reduction for Moore XFSMs.
This book discusses Moore finite state machines (FSMs) implemented with field programmable gate arrays (FPGAs) including look-up table (LUT) elements and embedded memory blocks (EMBs). To minimize the number of LUTs in FSM logic circuits, the authors propose replacing a state register with a state counter. They also put forward an approach allowing linear chains of states to be created, which simplifies the system of input memory functions and, therefore, decreases the number of LUTs in the resulting FSM circuit. The authors combine this approach with using EMBs to implement the system of output functions (microoperations). This allows a significant decrease in the number of LUTs, as well as eliminating a lot of interconnections in the FSM logic circuit. As a rule, it also reduces the area occupied by the circuit and diminishes the resulting power dissipation. This book is an interesting and valuable resource for students and postgraduates in the area of computer science, as well as for designers of digital systems that included complex control units.
UABC ; Temporal ; 01/01/2021-12/31/2023.