TY  - BOOK
AU  - Ruiz-Amaya,Jesús
AU  - Delgado-Restituto,Manuel
AU  - Rodríguez-Vázquez,Ángel
ED  - SpringerLink (Online service)
TI  - Device-Level Modeling and Synthesis of High-Performance Pipeline ADCs
SN  - 9781441988461
AV  - TK7888.4 
U1  - 621.3815 23
PY  - 2011///
CY  - New York, NY
PB  - Springer New York, Imprint: Springer
KW  - Engineering
KW  - Computer science
KW  - Systems engineering
KW  - Circuits and Systems
KW  - Signal, Image and Speech Processing
KW  - Processor Architectures
N1  - Pipeline ADC Overview -- Design Methodologies for Pipeline ADCs -- Pipeline ADC Electrical-level Synthesis Tool -- Behavioural Modeling of Pipeline ADCs -- Case Study: Design of a 10BIT@60MS Pipeline ADC -- Experimental Results and State of the Art -- Conclusions and Future Lines of Research
N2  - This book presents models and procedures to design pipeline analog-to-digital converters, compensating for device inaccuracies, so that high-performance specs can be met within short design cycles. These models are capable of capturing and predicting the behavior of pipeline data converters within less than half-a-bit deviation, versus transistor-level simulations.  As a result, far fewer model iterations are required across the design cycle. Models described in this book accurately predict transient behaviors, which are key to the performance of discrete-time systems and hence to the performance of pipeline data converters.  Describes efficient procedures for heirarchical top-down design of pipeline converters;  Presents new methodologies to reduce bottom-up iterations, through inherent embedding of transistor-level parameters, such as parasitic capacitances, transconductances, and saturation currents;   Provides mathematical details of behavioral models, includes descriptions of the synthesis methods and associated tools and illustrates models through case studies supported by silicon prototypes.        
UR  - http://148.231.10.114:2048/login?url=http://link.springer.com/book/10.1007/978-1-4419-8846-1
ER  -