TY  - BOOK
AU  - Jones,Keith
ED  - SpringerLink (Online service)
TI  - The Regularized Fast Hartley Transform: Optimal Formulation of Real-Data Fast Fourier Transform for Silicon-Based Implementation in Resource-Constrained Environments 
T2  - Signals and Communication Technology,
SN  - 9789048139170
AV  - TK1-9971 
U1  - 621.382 23
PY  - 2010///
CY  - Dordrecht
PB  - Springer Netherlands, Imprint: Springer
KW  - Engineering
KW  - Computer Communication Networks
KW  - Mathematics
KW  - Telecommunication
KW  - Communications Engineering, Networks
KW  - Applications of Mathematics
N1  - Background to Research -- Fast Solutions to Real-Data Discrete Fourier Transform -- The Discrete Hartley Transform -- Derivation of the Regularized Fast Hartley Transform -- Algorithm Design for Hardware-Based Computing Technologies -- Derivation of Area-Efficient and Scalable Parallel Architecture -- Design of Arithmetic Unit for Resource-Constrained Solution -- Computation of 2n-Point Real-Data Discrete Fourier Transform -- Applications of Regularized Fast Hartley Transform -- Summary and Conclusions
N2  - When designing high-performance DSP systems for implementation with silicon-based computing technology, the oft-encountered problem of the real-data DFT is typically addressed by exploiting an existing complex-data FFT, which can easily result in an overly complex and resource-hungry solution. The research described in The Regularized Fast Hartley Transform: Optimal Formulation of Real-Data Fast Fourier Transform for Silicon-Based Implementation in Resource-Constrained Environments deals with the problem by exploiting directly the real-valued nature of the data and is targeted at those real-world applications, such as mobile communications, where size and power constraints play key roles in the design and implementation of an optimal solution. The Regularized Fast Hartley Transform provides the reader with the tools necessary to both understand the proposed new formulation and to implement simple design variations that offer clear implementational advantages, both practical and theoretical, over more conventional complex-data solutions to the problem. The highly-parallel formulation described is shown to lead to scalable and device-independent solutions to the latency-constrained version of the problem which are able to optimize the use of the available silicon resources, and thus to maximize the achievable computational density, thereby making the solution a genuine advance in the design and implementation of high-performance parallel FFT algorithms
UR  - http://148.231.10.114:2048/login?url=http://link.springer.com/book/10.1007/978-90-481-3917-0
ER  -