TY  - BOOK
AU  - Palchaudhuri,Ayan
AU  - Chakraborty,Rajat Subhra
ED  - SpringerLink (Online service)
TI  - High Performance Integer Arithmetic Circuit Design on FPGA: Architecture, Implementation and Design Automation 
T2  - Springer Series in Advanced Microelectronics,
SN  - 9788132225201
AV  - TK7888.4 
U1  - 621.3815 23
PY  - 2016///
CY  - New Delhi
PB  - Springer India, Imprint: Springer
KW  - Engineering
KW  - Logic design
KW  - Electronics
KW  - Microelectronics
KW  - Electronic circuits
KW  - Circuits and Systems
KW  - Electronics and Microelectronics, Instrumentation
KW  - Logic Design
N1  - Introduction -- Architecture of Target FPGA Platform -- A Fabric Component based Design Approach for High Performance Integer Arithmetic Circuits -- Architecture of Data path Circuits -- Architecture of Control path Circuits -- Compact FPGA Implementation of Linear Cellular Automata -- Design Automation and Case Studies -- Conclusions and Future Work
N2  - This book describes the optimized implementations of several arithmetic datapath, controlpath and pseudorandom sequence generator circuits for realization of high performance arithmetic circuits targeted towards a specific family of the high-end Field Programmable Gate Arrays (FPGAs). It explores regular, modular, cascadable, and bit-sliced architectures of these circuits, by directly instantiating the target FPGA-specific primitives in the HDL. Every proposed architecture is justified with detailed mathematical analyses. Simultaneously, constrained placement of the circuit building blocks is performed, by placing the logically related hardware primitives in close proximity to one another by supplying relevant placement constraints in the Xilinx proprietary ?User Constraints File?. The book covers the implementation of a GUI-based CAD tool named FlexiCore integrated with the Xilinx Integrated Software Environment (ISE) for design automation of platform-specific high-performance arithmetic circuits from user-level specifications. This tool has been used to implement the proposed circuits, as well as hardware implementations of integer arithmetic algorithms where several of the proposed circuits are used as building blocks. Implementation results demonstrate higher performance and superior operand-width scalability for the proposed circuits, with respect to implementations derived through other existing approaches. This book will prove useful to researchers, students, and professionals engaged in the domain of FPGA circuit optimization and implementation
UR  - http://148.231.10.114:2048/login?url=http://dx.doi.org/10.1007/978-81-322-2520-1
ER  -