TY - BOOK AU - Melikyan,Vazgen ED - SpringerLink (Online service) TI - Simulation and Optimization of Digital Circuits: Considering and Mitigating Destabilizing Factors SN - 9783319716374 AV - TK7888.4 U1 - 621.3815 23 PY - 2018/// CY - Cham PB - Springer International Publishing, Imprint: Springer KW - Electronic circuits KW - Microprocessors KW - Logic design KW - Circuits and Systems KW - Processor Architectures KW - Logic Design N1 - Acceso multiusuario; Introduction -- General issues of gate-level simulation and optimization of digital circuits with consideration of DF -- Models of logical elements for DF consideration -- Models for determining the influence of DF -- Algorithmic implementation of the automated system of gate-level simulation of digital circuits with consideration of DF -- Optimization of digital circuits with consideration of DF -- Linguistic and software development of the automated system of gate-level simulation of digital circuits with consideration of DF N2 - This book describes new, fuzzy logic-based mathematical apparatus, which enable readers to work with continuous variables, while implementing whole circuit simulations with speed, similar to gate-level simulators and accuracy, similar to circuit-level simulators. The author demonstrates newly developed principles of digital integrated circuit simulation and optimization that take into consideration various external and internal destabilizing factors, influencing the operation of digital ICs. The discussion includes factors including radiation, ambient temperature, electromagnetic fields, and climatic conditions, as well as non-ideality of interconnects and power rails. Discusses the construction of a new class of simulators that takes into account various internal and external destabilizing effects on the operation of digital integrated circuits; Includes detailed explanation of key topics, including models, algorithms, and characteristics of software development; Focuses on issues pertaining currently to development of real integrated circuits UR - http://148.231.10.114:2048/login?url=https://doi.org/10.1007/978-3-319-71637-4 ER -