Microelectronic Test Structures for CMOS Technology [recurso electrónico] / by Manjul Bhushan, Mark B. Ketchen.
Tipo de material: TextoEditor: New York, NY : Springer New York : Imprint: Springer, 2011Descripción: XXXIV, 373 p. online resourceTipo de contenido: text Tipo de medio: computer Tipo de portador: online resourceISBN: 9781441993779Tema(s): Engineering | Electronics | Systems engineering | Optical materials | Engineering | Electronics and Microelectronics, Instrumentation | Optical and Electronic Materials | Circuits and SystemsFormatos físicos adicionales: Printed edition:: Sin títuloClasificación CDD: 621.381 Clasificación LoC:TK7800-8360TK7874-7874.9Recursos en línea: Libro electrónicoTipo de ítem | Biblioteca actual | Colección | Signatura | Copia número | Estado | Fecha de vencimiento | Código de barras |
---|---|---|---|---|---|---|---|
Libro Electrónico | Biblioteca Electrónica | Colección de Libros Electrónicos | TK7800 -8360 (Browse shelf(Abre debajo)) | 1 | No para préstamo | 372211-2001 |
Introduction -- Test Structure Basics -- Resistors -- Capacitors -- MOSFETs -- Ring Oscillators -- High Speed Characterization -- Test Structures of SOI Technology -- Test Equipment and Measurements -- Data Analysis.
Microelectronic Test Structures for CMOS Technology and Products addresses the basic concepts of the design of test structures for incorporation within test-vehicles, scribe-lines, and CMOS products. The role of test structures in the development and monitoring of CMOS technologies and products has become ever more important with the increased cost and complexity of development and manufacturing. In this timely volume, IBM scientists Manjul Bhushan and Mark Ketchen emphasize high speed characterization techniques for digital CMOS circuit applications and bridging between circuit performance and characteristics of MOSFETs and other circuit elements. Detailed examples are presented throughout, many of which are equally applicable to other microelectronic technologies as well. The authors’ overarching goal is to provide students and technology practitioners alike a practical guide to the disciplined design and use of test structures that give unambiguous information on the parametrics and performance of digital CMOS technology.
19