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Application-Specific Mesh-based Heterogeneous FPGA Architectures [recurso electrónico] / by Husain Parvez, Habib Mehrez.

Por: Parvez, Husain [author.]Colaborador(es): Mehrez, Habib [author.] | SpringerLink (Online service)Tipo de material: Texto

TextoEditor: New York, NY : Springer New York, 2011Descripción: XVII, 150 p. online resourceTipo de contenido: text Tipo de medio: computer Tipo de portador: online resourceISBN: 9781441979285Tema(s): Engineering | Electronics | Systems engineering | Engineering | Circuits and Systems | Electronics and Microelectronics, InstrumentationFormatos físicos adicionales: Printed edition:: Sin títuloClasificación CDD: 621.3815 Clasificación LoC:TK7888.4Recursos en línea: Libro electrónico Texto

Contenidos:

Introduction -- State of the Art -- FPGA Layout Generation -- ASIF: Application Specific Inflexible FPGA -- ASIF using Heterogeneous Logic Blocks -- ASIF Hardware Generation -- Conclusion and Future Lines of Research.

En: Springer eBooksResumen: Low volume production of FPGA-based products is quite effective and economical because they are easy to design and program in the shortest amount of time. The generic reconfigurable resources in an FPGA can be programmed to execute a wide variety of applications at mutually exclusive times. However, the flexibility of FPGAs makes them much larger, slower, and more power consuming than their counterpart ASICs. Consequently, FPGAs are unsuitable for applications requiring high volume production, high performance or low power consumption. This book presents a new exploration environment for mesh-based, heterogeneous FPGA architectures. It describes state-of-the-art techniques for reducing area requirements in FPGA architectures, which also increase performance and enable reduction in power required. Coverage focuses on reduction of FPGA area by introducing heterogeneous hard-blocks (such as multipliers, adders etc) in FPGAs, and by designing application specific FPGAs. Automatic FPGA layout generation techniques are employed to decrease non-recurring engineering (NRE) costs and time-to-market of application-specific, heterogeneous FPGA architectures. Presents a new exploration environment for mesh-based, heterogeneous FPGA architectures; Describes state-of-the-art techniques for reducing area requirements in FPGA architectures; Enables reduction in power required and increase in performance.

Existencias ( 1 )
Notas de título ( 3 )

Existencias
Tipo de ítem	Biblioteca actual	Colección	Signatura	Copia número	Estado	Fecha de vencimiento	Código de barras
Libro Electrónico	Biblioteca Electrónica	Colección de Libros Electrónicos	TK7888.4 (Browse shelf(Abre debajo))	1	No para préstamo		372062-2001

Low volume production of FPGA-based products is quite effective and economical because they are easy to design and program in the shortest amount of time. The generic reconfigurable resources in an FPGA can be programmed to execute a wide variety of applications at mutually exclusive times. However, the flexibility of FPGAs makes them much larger, slower, and more power consuming than their counterpart ASICs. Consequently, FPGAs are unsuitable for applications requiring high volume production, high performance or low power consumption. This book presents a new exploration environment for mesh-based, heterogeneous FPGA architectures. It describes state-of-the-art techniques for reducing area requirements in FPGA architectures, which also increase performance and enable reduction in power required. Coverage focuses on reduction of FPGA area by introducing heterogeneous hard-blocks (such as multipliers, adders etc) in FPGAs, and by designing application specific FPGAs. Automatic FPGA layout generation techniques are employed to decrease non-recurring engineering (NRE) costs and time-to-market of application-specific, heterogeneous FPGA architectures. Presents a new exploration environment for mesh-based, heterogeneous FPGA architectures; Describes state-of-the-art techniques for reducing area requirements in FPGA architectures; Enables reduction in power required and increase in performance.