Thread and Data Mapping for Multicore Systems [electronic resource] : Improving Communication and Memory Accesses / by Eduardo H. M. Cruz, Matthias Diener, Philippe O. A. Navaux.

Por: H. M. Cruz, Eduardo [author.]Colaborador(es): Diener, Matthias [author.] | O. A. Navaux, Philippe [author.] | SpringerLink (Online service)Tipo de material: TextoTextoSeries SpringerBriefs in Computer ScienceEditor: Cham : Springer International Publishing : Imprint: Springer, 2018Edición: 1st ed. 2018Descripción: IX, 54 p. 34 illus. online resourceTipo de contenido: text Tipo de medio: computer Tipo de portador: online resourceISBN: 9783319910741Tema(s): Computer hardware | Software engineering | Computer Hardware | Software Engineering/Programming and Operating SystemsFormatos físicos adicionales: Printed edition:: Sin título; Printed edition:: Sin títuloClasificación CDD: 004 Clasificación LoC:QA75.5-76.95TK7885-7895Recursos en línea: Libro electrónicoTexto
Contenidos:
preface -- chapter 1: introduction -- chapter 2: Sharing-aware mapping and parallel architectures -- chapter 3: Sharing-aware mapping and parallel applications -- chapter 4: Sharing-Aware mapping methods -- chapter 5: Improving performance with Sharing-Aware mapping -- chapter 6: conclusion and research prospects -- index.
En: Springer Nature eBookResumen: This book presents a study on how thread and data mapping techniques can be used to improve the performance of multi-core architectures. It describes how the memory hierarchy introduces non-uniform memory access, and how mapping can be used to reduce the memory access latency in current hardware architectures. On the software side, this book describes the characteristics present in parallel applications that are used by mapping techniques to improve memory access. Several state-of-the-art methods are analyzed, and the benefits and drawbacks of each one are identified.
Star ratings
    Valoración media: 0.0 (0 votos)
Existencias
Tipo de ítem Biblioteca actual Colección Signatura Copia número Estado Fecha de vencimiento Código de barras
Libro Electrónico Biblioteca Electrónica
Colección de Libros Electrónicos 1 No para préstamo

Acceso multiusuario

preface -- chapter 1: introduction -- chapter 2: Sharing-aware mapping and parallel architectures -- chapter 3: Sharing-aware mapping and parallel applications -- chapter 4: Sharing-Aware mapping methods -- chapter 5: Improving performance with Sharing-Aware mapping -- chapter 6: conclusion and research prospects -- index.

This book presents a study on how thread and data mapping techniques can be used to improve the performance of multi-core architectures. It describes how the memory hierarchy introduces non-uniform memory access, and how mapping can be used to reduce the memory access latency in current hardware architectures. On the software side, this book describes the characteristics present in parallel applications that are used by mapping techniques to improve memory access. Several state-of-the-art methods are analyzed, and the benefits and drawbacks of each one are identified.

UABC ; Temporal ; 01/01/2021-12/31/2023.

Con tecnología Koha