000 04428nam a22004335i 4500
001 u371211
003 SIRSI
005 20160812080116.0
007 cr nn 008mamaa
008 100316s2010 xxu| s |||| 0|eng d
020 _a9781441909442
_9978-1-4419-0944-2
040 _cMX-MeUAM
050 4 _aTK7888.4
082 0 4 _a621.3815
_223
100 1 _aGulati, Kanupriya.
_eauthor.
245 1 0 _aHardware Acceleration of EDA Algorithms
_h[recurso electrónico] :
_bCustom ICs, FPGAs and GPUs /
_cby Kanupriya Gulati, Sunil P. Khatri.
264 1 _aBoston, MA :
_bSpringer US,
_c2010.
300 _aXXII, 192 p.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
505 0 _aAlternative Hardware Platforms -- Hardware Platforms -- GPU Architecture and the CUDA Programming Model -- Control Dominated Category -- Accelerating Boolean Satisfiability on a Custom IC -- Accelerating Boolean Satisfiability on an FPGA -- Accelerating Boolean Satisfiability on a Graphics Processing Unit -- Control Plus Data Parallel Applications -- Accelerating statistical static Timing Analysis Using Graphics Processors -- Accelerating Fault Simulation Using Graphics Processors -- Fault Table Generation Using Graphics Processors -- Accelerating Circuit Simulation Using Graphics Processors -- Automated Generation of GPU Code -- Automated Approach for Graphics Processor Based Software Acceleration -- Conclusions.
520 _aHardware Acceleration of EDA Algorithms: Custom ICs, FPGAs and GPUs Kanupriya Gulati Sunil P. Khatri This book deals with the acceleration of EDA algorithms using hardware platforms such as Custom ICs, FPGAs and GPUs. Widely applied CAD algorithms are studied for potential acceleration on these platforms. Coverage includes discussion of conditions under which it is preferable to use one platform over another, e.g., when an EDA problem has a high degree of data parallelism, the GPU is typically the preferred platform, whereas when the problem has more control, an FPGA may be preferred. Results are presented for the acceleration of several CAD algorithms (fault simulation, fault table generation, model card evaluation in SPICE, Monte Carlo based statistical static timing analysis, Boolean Satisfiability), demonstrating speedups up to 800X compared to single-core implementatinos of these algorithms. This book serves as a valuable guide on how best to leverage parallelism to accelerate CAD algorithms. It also presents a methodology to automatically extract SIMD parallelism from regular uniprocessor code which satisfies a set of constraints. With this approach, such uniprocessor code can automatically be converted to GPU code, allowing for significant acceleration. This approach is particularly useful since different GPUs have vastly different specifications, making the manual generation of GPU code an unscalable proposition. In particular, this book: Provides guidelines on whether to use Custom ICs, GPUs or FPGAs when accelerating a given EDA algorithm, validating these suggestions with a concrete example (Boolean Satisfiability) implemented on all these platforms; Demonstrates the acceleration of several popular EDA algorithms on GPUs, with speedups up to 800X; Helps the reader by presenting example algorithms which may be used by the reader to determine how best to accelerate their specific EDA algorithm; Discusses an automatic approach to generate GPU code, given regular uniprocessor code which satisfies a set of constraints; Serves as a valuable reference for anyone interested in exploring alternative hardware platforms for accelerating various EDA applications by harnessing the parallelism available in these platforms.
650 0 _aEngineering.
650 0 _aComputer aided design.
650 0 _aSystems engineering.
650 1 4 _aEngineering.
650 2 4 _aCircuits and Systems.
650 2 4 _aComputer-Aided Engineering (CAD, CAE) and Design.
700 1 _aKhatri, Sunil P.
_eauthor.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9781441909435
856 4 0 _zLibro electrónico
_uhttp://148.231.10.114:2048/login?url=http://link.springer.com/book/10.1007/978-1-4419-0944-2
596 _a19
942 _cLIBRO_ELEC
999 _c199091
_d199091