000			03782nam a22004695i 4500
001			u371597
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007			cr nn 008mamaa
008			101029s2011 xxu| s |||| 0|eng d
020			_a9781441962171 _9978-1-4419-6217-1
040			_cMX-MeUAM
050		4	_aTK7888.4
082	0	4	_a621.3815 _223
100	1		_aStanisavljevic, Miloš. _eauthor.
245	1	0	_aReliability of Nanoscale Circuits and Systems _h[recurso electrónico] : _bMethodologies and Circuit Architectures / _cby Miloš Stanisavljevic, Alexandre Schmid, Yusuf Leblebici.
264		1	_aNew York, NY : _bSpringer New York, _c2011.
300			_aXXVII, 195 p. _bonline resource.
336			_atext _btxt _2rdacontent
337			_acomputer _bc _2rdamedia
338			_aonline resource _bcr _2rdacarrier
347			_atext file _bPDF _2rda
505	0		_aIntroduction -- Reliability, Faults and Fault Models -- Nanotechnology and Nanodevices -- Fault-Tolerant Architectures and Approaches -- Reliability Evaluation Techniques -- Averaging Design Implementations -- Statistical Evaluation of Fault-Tolerance Using Proability Density Functions -- System Level Reliability Evaluation and Optimization -- Summary and Conclusions -- References.
520			_aReliability of Nanoscale Circuits and Systems: Methodologies and Circuit Architectures Milos Stanisavljevic Alexandre Schmid Yusuf Leblebici Future integrated circuits are expected to be made of emerging nanodevices and their associated interconnects, but the reliability of such components is a major threat to the design of future integrated computing systems. Reliability of Nanoscale Circuits and Systems: Methodologies and Circuit Architectures confronts that challenge. The first part discusses the state-of-the-art of the circuits and systems as well as the architectures and methodologies focusing the enhancement of the reliability of digital integrated circuits. It proposes circuit and system level solutions to overcome high defect density and presents reliability, fault models and fault tolerance. It includes an overview of nano-technologies that are considered in the fabrication of future integrated circuits and covers solutions provided in the early ages of CMOs as well as recent techniques. The second part of the text analyzes original circuit and system level solutions. It details an architecture suitable for circuit-level and gate-level redundant modules implementation and exhibiting significant immunity to permanent and random failures as well as unwanted fluctuation and the fabrication parameters. It also proposes a novel general method enabling the introduction of fault-tolerance and evaluation of the circuit and architecture reliability. And the third part proposes a new methodology that introduces reliability in existing design flows. That methodology consists of partitioning the full system to design into reliability optimal partitions and applying reliability evaluation and optimization at local and system level.
650		0	_aEngineering.
650		0	_aComputer aided design.
650		0	_aSystem safety.
650		0	_aSystems engineering.
650	1	4	_aEngineering.
650	2	4	_aCircuits and Systems.
650	2	4	_aQuality Control, Reliability, Safety and Risk.
650	2	4	_aComputer-Aided Engineering (CAD, CAE) and Design.
700	1		_aSchmid, Alexandre. _eauthor.
700	1		_aLeblebici, Yusuf. _eauthor.
710	2		_aSpringerLink (Online service)
773	0		_tSpringer eBooks
776	0	8	_iPrinted edition: _z9781441962164
856	4	0	_zLibro electrónico _uhttp://148.231.10.114:2048/login?url=http://link.springer.com/book/10.1007/978-1-4419-6217-1
596			_a19
942			_cLIBRO_ELEC
999			_c199477 _d199477