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001 | u372090 | ||
003 | SIRSI | ||
005 | 20160812080204.0 | ||
007 | cr nn 008mamaa | ||
008 | 101125s2011 xxu| s |||| 0|eng d | ||
020 |
_a9781441980342 _9978-1-4419-8034-2 |
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040 | _cMX-MeUAM | ||
050 | 4 | _aTK7888.4 | |
082 | 0 | 4 |
_a621.3815 _223 |
100 | 1 |
_aWagner, Ilya. _eauthor. |
|
245 | 1 | 0 |
_aPost-Silicon and Runtime Verification for Modern Processors _h[recurso electrónico] / _cby Ilya Wagner, Valeria Bertacco. |
264 | 1 |
_aBoston, MA : _bSpringer US, _c2011. |
|
300 |
_aXVII, 224 p. _bonline resource. |
||
336 |
_atext _btxt _2rdacontent |
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337 |
_acomputer _bc _2rdamedia |
||
338 |
_aonline resource _bcr _2rdacarrier |
||
347 |
_atext file _bPDF _2rda |
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505 | 0 | _aVerification of a Modern Processor -- The Verification Universe -- Test Generation and Response Evaluation for Processors Cores in Post-Silicon -- Post-Silicon Verification of Multi-Core Processors -- Run-Time Verification Through Hardware Patching and Error Avoidance -- The Future of Post-Silicon Verification. | |
520 | _aPost-Silicon and Run-Time Verification for Modern Processors surveys the state of the art and evolving directions in post-silicon and runtime verification. The volume gives an overview of the state of the art in verification, particularly current post-silicon methodologies in use in the industry, both for the domain of processor pipeline design and for memory subsystems. There is also a thorough presentation of several new post-silicon verification solutions aimed at boosting the verification coverage of modern processors. The presentation of runtime verification solutions follows a similar approach. This is an area of processor design that is still in its early stages of exploration and could help accomplish the ultimate goal of complete correctness guarantees for microprocessor-based computation. The book also: · Addresses an area of hardware verification that is growing both in industry and academia · Covers hardware patching and error avoidance · ?? Discusses multi-core processors with test generation and response evaluation The authors conclude the book with a look towards the future of late-stage verification and its growing role in the processor life-cycle. Post-Silicon and Run-Time Verification for Modern Processors will be a valuable book for researchers and engineers working in electrical engineering. | ||
650 | 0 | _aEngineering. | |
650 | 0 | _aComputer hardware. | |
650 | 0 | _aComputer aided design. | |
650 | 0 | _aSystems engineering. | |
650 | 1 | 4 | _aEngineering. |
650 | 2 | 4 | _aCircuits and Systems. |
650 | 2 | 4 | _aComputer Hardware. |
650 | 2 | 4 | _aComputer-Aided Engineering (CAD, CAE) and Design. |
700 | 1 |
_aBertacco, Valeria. _eauthor. |
|
710 | 2 | _aSpringerLink (Online service) | |
773 | 0 | _tSpringer eBooks | |
776 | 0 | 8 |
_iPrinted edition: _z9781441980335 |
856 | 4 | 0 |
_zLibro electrónico _uhttp://148.231.10.114:2048/login?url=http://link.springer.com/book/10.1007/978-1-4419-8034-2 |
596 | _a19 | ||
942 | _cLIBRO_ELEC | ||
999 |
_c199970 _d199970 |