000			02850nam a22004215i 4500
001			u372104
003			SIRSI
005			20160812080205.0
007			cr nn 008mamaa
008			110228s2011 xxu| s |||| 0|eng d
020			_a9781441981042 _9978-1-4419-8104-2
040			_cMX-MeUAM
050		4	_aQC71.82-73.8
082	0	4	_a621.042 _223
100	1		_aSasao, Tsutomu. _eauthor.
245	1	0	_aMemory-Based Logic Synthesis _h[recurso electrónico] / _cby Tsutomu Sasao.
264		1	_aNew York, NY : _bSpringer New York : _bImprint: Springer, _c2011.
300			_aXII, 189 p. _bonline resource.
336			_atext _btxt _2rdacontent
337			_acomputer _bc _2rdamedia
338			_aonline resource _bcr _2rdacarrier
347			_atext file _bPDF _2rda
505	0		_aIntroduction -- Basic Elements -- Definitions and Basic Properties -- MUX-Based Synthesis -- Cascade-Based Synthesis -- Encoding Method -- Functions with Small C-Measures -- C-Measure of Sparse Functions -- Index Generation Functions -- Hash-Based Synthesis -- Reduction of the Number of Variables -- Various Realizations -- Conclusions.
520			_aThis book describes the synthesis of logic functions using memories. It is useful to design field programmable gate arrays (FPGAs) that contain both small-scale memories, called look-up tables (LUTs), and medium-scale memories, called embedded memories.  This is a valuable reference for both FPGA system designers and CAD tool developers, concerned with logic synthesis for FPGAs.  Anyone using logic gates to design logic circuits, you can benefit from the methods described in this book.  Describes in detail the synthesis of logic functions using memories;  Introduces a look-up tables (LUT) cascade as a new architecture for logic synthesis;  Shows logic design methods for index generation functions;  Introduces C-measure, which specifies the complexity of Boolean functions;  Introduces hash-based design methods, which efficiently synthesize index generation functions by pairs of smaller memories and can be applied to IP address tables, packet filtering, terminal access controllers, memory patch circuits, virus scanning circuits, intrusion detection circuits, fault map of memories, code converters and pattern matching.
650		0	_aComputer aided design.
650		0	_aSystems engineering.
650	1	4	_aEnergy.
650	2	4	_aEnergy, general.
650	2	4	_aCircuits and Systems.
650	2	4	_aComputer-Aided Engineering (CAD, CAE) and Design.
710	2		_aSpringerLink (Online service)
773	0		_tSpringer eBooks
776	0	8	_iPrinted edition: _z9781441981035
856	4	0	_zLibro electrónico _uhttp://148.231.10.114:2048/login?url=http://link.springer.com/book/10.1007/978-1-4419-8104-2
596			_a19
942			_cLIBRO_ELEC
999			_c199984 _d199984