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008 100806s2010 ne | s |||| 0|eng d
020 _a9789048192168
_9978-90-481-9216-8
040 _cMX-MeUAM
050 4 _aTK7888.4
082 0 4 _a621.3815
_223
100 1 _aIniewski, Krzysztof.
_eeditor.
245 1 0 _aCMOS Processors and Memories
_h[recurso electrónico] /
_cedited by Krzysztof Iniewski.
264 1 _aDordrecht :
_bSpringer Netherlands :
_bImprint: Springer,
_c2010.
300 _aVI, 382 p.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aAnalog Circuits and Signal Processing
505 0 _aProcessors -- Design of High Performance Low Power Microprocessors -- Towards High-Performance and Energy-Efficient Multi-core Processors -- Low Power Asynchronous Circuit Design: An FFT/IFFT Processor -- CMOL/CMOS Implementations of Bayesian Inference Engine: Digital and Mixed-Signal Architectures and Performance/Price – A Hardware Design Space Exploration -- A Hybrid CMOS-Nano FPGA Based on Majority Logic: From Devices to Architecture -- Memories -- Memory Systems for Nano-computer -- Flash Memory -- CMOS-based Spin-Transfer Torque Magnetic Random Access Memory (ST–MRAM) -- Magnetization Switching in Spin Torque Random Access Memory: Challenges and Opportunities -- High Performance Embedded Dynamic Random Access Memory in Nano-Scale Technologies -- Timing Circuit Design in High Performance DRAM -- Overview and Scaling Prospect of Ferroelectric Memories.
520 _aCMOS Processors and Memories addresses the-state-of-the-art in integrated circuit design in the context of emerging computing systems. New design opportunities in memories and processor are discussed. Emerging materials that can take system performance beyond standard CMOS, like carbon nanotubes, graphene, ferroelectrics and tunnel junctions are explored. CMOS Processors and Memories is divided into two parts: processors and memories. In the first part we start with high performance, low power processor design, followed by a chapter on multi-core processing. They both represent state-of-the-art concepts in current computing industry. The third chapter deals with asynchronous design that still carries lots of promise for future computing needs. At the end we present a “hardware design space exploration” methodology for implementing and analyzing the hardware for the Bayesian inference framework. This particular methodology involves: analyzing the computational cost and exploring candidate hardware components, proposing various custom architectures using both traditional CMOS and hybrid nanotechnology CMOL. The first part concludes with hybrid CMOS-Nano architectures. The second, memory part covers state-of-the-art SRAM, DRAM, and flash memories as well as emerging device concepts. Semiconductor memory is a good example of the full custom design that applies various analog and logic circuits to utilize the memory cell’s device physics. Critical physical effects that include tunneling, hot electron injection, charge trapping (Flash memory) are discussed in detail. Emerging memories like FRAM, PRAM and ReRAM that depend on magnetization, electron spin alignment, ferroelectric effect, built-in potential well, quantum effects, and thermal melting are also described. CMOS Processors and Memories is a must for anyone serious about circuit design for future computing technologies. The book is written by top notch international experts in industry and academia. It can be used in graduate course curriculum.
650 0 _aEngineering.
650 0 _aSystems engineering.
650 1 4 _aEngineering.
650 2 4 _aCircuits and Systems.
650 2 4 _aSolid State Physics.
650 2 4 _aNanotechnology and Microengineering.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9789048192151
830 0 _aAnalog Circuits and Signal Processing
856 4 0 _zLibro electrónico
_uhttp://148.231.10.114:2048/login?url=http://link.springer.com/book/10.1007/978-90-481-9216-8
596 _a19
942 _cLIBRO_ELEC
999 _c205825
_d205825