000			03195nam a22004815i 4500
001			978-3-319-23389-5
003			DE-He213
005			20180206183126.0
007			cr nn 008mamaa
008			151114s2016 gw | s |||| 0|eng d
020			_a9783319233895 _9978-3-319-23389-5
050		4	_aTK7888.4
072		7	_aTJFC _2bicssc
072		7	_aTEC008010 _2bisacsh
082	0	4	_a621.3815 _223
245	1	0	_aNear Threshold Computing _h[recurso electrónico] : _bTechnology, Methods and Applications / _cedited by Michael Hübner, Cristina Silvano.
250			_a1st ed. 2016.
264		1	_aCham : _bSpringer International Publishing : _bImprint: Springer, _c2016.
300			_aIX, 101 p. 56 illus., 37 illus. in color. _bonline resource.
336			_atext _btxt _2rdacontent
337			_acomputer _bc _2rdamedia
338			_aonline resource _bcr _2rdacarrier
347			_atext file _bPDF _2rda
505	0		_aPART I: NTC opportunities, challenges and limits -- Chapter 1: Extreme Energy Efficiency by Near Threshold Voltage Operation -- Part II Micro-architecture challenges and energy management at NTC -- Chapter2: Many-core Architecture for NTC: Energy Efficiency from the Ground Up -- Chapter 3: Variability-Aware Voltage Island Management for Near-Threshold Voltage Computing With Performance Guarantees -- Part III Memory system design for NTC -- Chapter4: Resizable Data Composer (RDC) Cache: A Near-Threshold Cache tolerating Process Variation Via architectural fault tolerance -- Chapter 5 Memories for NTC.
520			_aThis book explores near-threshold computing (NTC), a design-space using techniques to run digital chips (processors) near the lowest possible voltage. Readers will be enabled with specific techniques to design chips that are extremely robust; tolerating variability and resilient against errors. Variability-aware voltage and frequency allocation schemes will be presented that will provide performance guarantees, when moving toward near-threshold manycore chips. · Provides an introduction to near-threshold computing, enabling reader with a variety of tools to face the challenges of the power/utilization wall; · Demonstrates how to design efficient voltage regulation, so that each region of the chip can operate at the most efficient voltage and frequency point; · Investigates how performance guarantees can be ensured when moving towards NTC manycores through variability-aware voltage and frequency allocation schemes.
650		0	_aEngineering.
650		0	_aMicroprocessors.
650		0	_aElectronic circuits.
650	1	4	_aEngineering.
650	2	4	_aCircuits and Systems.
650	2	4	_aProcessor Architectures.
650	2	4	_aElectronic Circuits and Devices.
700	1		_aHübner, Michael. _eeditor.
700	1		_aSilvano, Cristina. _eeditor.
710	2		_aSpringerLink (Online service)
773	0		_tSpringer eBooks
776	0	8	_iPrinted edition: _z9783319233888
856	4	0	_zLibro electrónico _uhttp://148.231.10.114:2048/login?url=http://dx.doi.org/10.1007/978-3-319-23389-5
912			_aZDB-2-ENG
942			_cLIBRO_ELEC
999			_c227635 _d227635