000 | 03273nam a22005655i 4500 | ||
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001 | 978-3-319-91074-1 | ||
003 | DE-He213 | ||
005 | 20210201191348.0 | ||
007 | cr nn 008mamaa | ||
008 | 180704s2018 gw | s |||| 0|eng d | ||
020 |
_a9783319910741 _9978-3-319-91074-1 |
||
050 | 4 | _aQA75.5-76.95 | |
050 | 4 | _aTK7885-7895 | |
072 | 7 |
_aUK _2bicssc |
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072 | 7 |
_aCOM067000 _2bisacsh |
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072 | 7 |
_aUK _2thema |
|
082 | 0 | 4 |
_a004 _223 |
100 | 1 |
_aH. M. Cruz, Eduardo. _eauthor. _4aut _4http://id.loc.gov/vocabulary/relators/aut |
|
245 | 1 | 0 |
_aThread and Data Mapping for Multicore Systems _h[electronic resource] : _bImproving Communication and Memory Accesses / _cby Eduardo H. M. Cruz, Matthias Diener, Philippe O. A. Navaux. |
250 | _a1st ed. 2018. | ||
264 | 1 |
_aCham : _bSpringer International Publishing : _bImprint: Springer, _c2018. |
|
300 |
_aIX, 54 p. 34 illus. _bonline resource. |
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336 |
_atext _btxt _2rdacontent |
||
337 |
_acomputer _bc _2rdamedia |
||
338 |
_aonline resource _bcr _2rdacarrier |
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347 |
_atext file _bPDF _2rda |
||
490 | 1 |
_aSpringerBriefs in Computer Science, _x2191-5768 |
|
500 | _aAcceso multiusuario | ||
505 | 0 | _apreface -- chapter 1: introduction -- chapter 2: Sharing-aware mapping and parallel architectures -- chapter 3: Sharing-aware mapping and parallel applications -- chapter 4: Sharing-Aware mapping methods -- chapter 5: Improving performance with Sharing-Aware mapping -- chapter 6: conclusion and research prospects -- index. | |
520 | _aThis book presents a study on how thread and data mapping techniques can be used to improve the performance of multi-core architectures. It describes how the memory hierarchy introduces non-uniform memory access, and how mapping can be used to reduce the memory access latency in current hardware architectures. On the software side, this book describes the characteristics present in parallel applications that are used by mapping techniques to improve memory access. Several state-of-the-art methods are analyzed, and the benefits and drawbacks of each one are identified. | ||
541 |
_fUABC ; _cTemporal ; _d01/01/2021-12/31/2023. |
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650 | 0 | _aComputer hardware. | |
650 | 0 | _aSoftware engineering. | |
650 | 1 | 4 |
_aComputer Hardware. _0https://scigraph.springernature.com/ontologies/product-market-codes/I1200X |
650 | 2 | 4 |
_aSoftware Engineering/Programming and Operating Systems. _0https://scigraph.springernature.com/ontologies/product-market-codes/I14002 |
700 | 1 |
_aDiener, Matthias. _eauthor. _4aut _4http://id.loc.gov/vocabulary/relators/aut |
|
700 | 1 |
_aO. A. Navaux, Philippe. _eauthor. _4aut _4http://id.loc.gov/vocabulary/relators/aut |
|
710 | 2 | _aSpringerLink (Online service) | |
773 | 0 | _tSpringer Nature eBook | |
776 | 0 | 8 |
_iPrinted edition: _z9783319910734 |
776 | 0 | 8 |
_iPrinted edition: _z9783319910758 |
830 | 0 |
_aSpringerBriefs in Computer Science, _x2191-5768 |
|
856 | 4 | 0 |
_zLibro electrónico _uhttp://148.231.10.114:2048/login?url=https://doi.org/10.1007/978-3-319-91074-1 |
912 | _aZDB-2-SCS | ||
912 | _aZDB-2-SXCS | ||
942 | _cLIBRO_ELEC | ||
999 |
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