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001 978-3-319-79081-7
003 DE-He213
005 20210201191413.0
007 cr nn 008mamaa
008 180419s2018 gw | s |||| 0|eng d
020 _a9783319790817
_9978-3-319-79081-7
050 4 _aTK7888.4
072 7 _aTJFC
_2bicssc
072 7 _aTEC008010
_2bisacsh
072 7 _aTJFC
_2thema
082 0 4 _a621.3815
_223
100 1 _aSalmani, Hassan.
_eauthor.
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
245 1 0 _aTrusted Digital Circuits
_h[electronic resource] :
_bHardware Trojan Vulnerabilities, Prevention and Detection /
_cby Hassan Salmani.
250 _a1st ed. 2018.
264 1 _aCham :
_bSpringer International Publishing :
_bImprint: Springer,
_c2018.
300 _aXI, 131 p. 76 illus., 43 illus. in color.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
500 _aAcceso multiusuario
505 0 _aThe Global Integrated Circuit Supply Chain Flow and the Hardware Trojan Attack -- Circuit Vulnerabilities to Hardware Trojans at the Register Transfer Level -- Design Techniques for Hardware Trojans Prevention and Detection at the Register Transfer Level -- Circuit Vulnerabilities to Hardware Trojans at the Gate Level -- Design Techniques for Hardware Trojans Prevention and Detection at the Gate Level -- Circuit Vulnerabilities to Hardware Trojan at the Layout Level -- Design Techniques for Hardware Trojans Prevention and Detection at the Layout Level -- Trusted Testing Techniques for Hardware Trojan Detection -- Hardware Trojans in Analog and Mixed-Signal Integrated Circuits.
520 _aThis book describes the integrated circuit supply chain flow and discusses security issues across the flow, which can undermine the trustworthiness of final design. The author discusses and analyzes the complexity of the flow, along with vulnerabilities of digital circuits to malicious modifications (i.e. hardware Trojans) at the register-transfer level, gate level and layout level. Various metrics are discussed to quantify circuit vulnerabilities to hardware Trojans at different levels. Readers are introduced to design techniques for preventing hardware Trojan insertion and to facilitate hardware Trojan detection. Trusted testing is also discussed, enabling design trustworthiness at different steps of the integrated circuit design flow. Coverage also includes hardware Trojans in mixed-signal circuits. Provides a comprehensive vulnerability analysis across the integrated circuits design flow; Introduces security metrics to measure quantitatively the vulnerability of a circuit to hardware Trojan insertion; Describes design techniques to prevent hardware Trojan insertion and to facilitate hardware Trojan detection; Presents testing techniques for trustworthiness at each circuit level.
541 _fUABC ;
_cTemporal ;
_d01/01/2021-12/31/2023.
650 0 _aElectronic circuits.
650 0 _aMicroprocessors.
650 0 _aComputer security.
650 1 4 _aCircuits and Systems.
_0https://scigraph.springernature.com/ontologies/product-market-codes/T24068
650 2 4 _aProcessor Architectures.
_0https://scigraph.springernature.com/ontologies/product-market-codes/I13014
650 2 4 _aSystems and Data Security.
_0https://scigraph.springernature.com/ontologies/product-market-codes/I28060
710 2 _aSpringerLink (Online service)
773 0 _tSpringer Nature eBook
776 0 8 _iPrinted edition:
_z9783319790800
776 0 8 _iPrinted edition:
_z9783319790824
776 0 8 _iPrinted edition:
_z9783030077228
856 4 0 _zLibro electrónico
_uhttp://148.231.10.114:2048/login?url=https://doi.org/10.1007/978-3-319-79081-7
912 _aZDB-2-ENG
912 _aZDB-2-SXE
942 _cLIBRO_ELEC
999 _c243103
_d243102