000 | 03525nam a22005535i 4500 | ||
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001 | 978-3-031-37924-6 | ||
003 | DE-He213 | ||
005 | 20250516155922.0 | ||
007 | cr nn 008mamaa | ||
008 | 230911s2024 sz | s |||| 0|eng d | ||
020 |
_a9783031379246 _9978-3-031-37924-6 |
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050 | 4 | _aTK7867-7867.5 | |
072 | 7 |
_aTJFC _2bicssc |
|
072 | 7 |
_aTEC008010 _2bisacsh |
|
072 | 7 |
_aTJFC _2thema |
|
082 | 0 | 4 |
_a621.3815 _223 |
100 | 1 |
_aRai, Shubham. _eauthor. _4aut _4http://id.loc.gov/vocabulary/relators/aut |
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245 | 1 | 0 |
_aDesign Automation and Applications for Emerging Reconfigurable Nanotechnologies _h[electronic resource] / _cby Shubham Rai, Akash Kumar. |
250 | _a1st ed. 2024. | ||
264 | 1 |
_aCham : _bSpringer Nature Switzerland : _bImprint: Springer, _c2024. |
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300 |
_aXXIV, 210 p. 70 illus., 41 illus. in color. _bonline resource. |
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336 |
_atext _btxt _2rdacontent |
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337 |
_acomputer _bc _2rdamedia |
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338 |
_aonline resource _bcr _2rdacarrier |
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347 |
_atext file _bPDF _2rda |
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505 | 0 | _aChapter 1. Introduction -- Chapter 2. Preliminaries -- Chapter 3. Exploring Circuit Design Topologies for RFETs -- Chapter 4. Standard Cells and Technology Mapping -- Chapter 5. Logic Synthesis with XOR-Majority Graphs -- Chapter 6. Physical synthesis flow and liberty generation -- Chapter 7. Polymporphic Primitives for Hardware Security -- Chapter 8. Conclusion. | |
520 | _aThis book is a single-source solution for anyone who is interested in exploring emerging reconfigurable nanotechnology at the circuit level. It lays down a solid foundation for circuits based on this technology having considered both manual as well as automated design flows. The authors discuss the entire design flow, consisting of both logic and physical synthesis for reconfigurable nanotechnology-based circuits. The authors describe how transistor reconfigurable properties can be exploited at the logic level to have a more efficient circuit design flow, as compared to conventional design flows suited for CMOS. Further, the book provides insights into hardware security features that can be intrinsically developed using the runtime reconfigurable features of this nanotechnology. Details an entire design automation flow for building circuits based on emerging reconfigurable nanotechnology; Describes logical abstraction for emerging reconfigurable nanotechnology that is essential for building newer circuits; Presents hardware security solutions that use reconfigurable nanotechnology to complement contemporary CMOS circuits. | ||
541 |
_fUABC ; _cPerpetuidad |
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650 | 0 | _aElectronic circuits. | |
650 | 0 | _aEmbedded computer systems. | |
650 | 0 | _aMicroprocessors. | |
650 | 0 | _aComputer architecture. | |
650 | 1 | 4 | _aElectronic Circuits and Systems. |
650 | 2 | 4 | _aEmbedded Systems. |
650 | 2 | 4 | _aProcessor Architectures. |
700 | 1 |
_aKumar, Akash. _eauthor. _4aut _4http://id.loc.gov/vocabulary/relators/aut |
|
710 | 2 | _aSpringerLink (Online service) | |
773 | 0 | _tSpringer Nature eBook | |
776 | 0 | 8 |
_iPrinted edition: _z9783031379239 |
776 | 0 | 8 |
_iPrinted edition: _z9783031379253 |
776 | 0 | 8 |
_iPrinted edition: _z9783031379260 |
856 | 4 | 0 |
_zLibro electrónico _uhttp://libcon.rec.uabc.mx:2048/login?url=https://doi.org/10.1007/978-3-031-37924-6 |
912 | _aZDB-2-ENG | ||
912 | _aZDB-2-SXE | ||
942 | _cLIBRO_ELEC | ||
999 |
_c273418 _d273417 |